Multiprocessor-type one-chip microcomputer with dual-mode functional

Abstract

A multiprocessor-type one-chip microcomputer, of the type having a plurality of processors, each having a separate address space, a plurality of programmable ROMs, for storing program data for each processor, and a set of functional terminals, with the microcomputer including a common writing bus and a control means for coupling either the common writing bus or a set of functional lines to the functional terminals based on the setting of a mode setting signal. During normal operations the functional lines are coupled to the functional terminals and each programmable ROM is accessed by a processor using addresses in the address space of the processor. When new instruction data is to be written to the programmable ROMs, the common writing bus is coupled to the functional terminals and instruction data is written to the programmable ROMs using addresses in a common address space.