The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 1996
Filed:
Apr. 13, 1995
Applicant:
Inventor:
Ming-Bing Chang, Santa Clara, CA (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 43 ; 437 67 ; 437984 ;
Abstract
The present invention provides a self-aligned trench isolation scheme for the MOS select transistors in an alternate metal virtual ground (AMG) EPROM array architecture. The new isolation scheme allows bit line to bit line spacing to be scaled to 0.6 .mu.m and below without compromising either data retention or memory performance characteristics. A new poly stack self-aligned etch scheme is also provided to scale the word line spacing to 0.6 .mu.m and below and, thus, allow a 64 Mbit EPROM array to be realized.