The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 1996
Filed:
Feb. 02, 1994
Michael T Wisor, Austin, TX (US);
Rita M O'Brien, Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A power management unit including a set of time-out counters and a software configurable state register is provided for managing power consumption within a computer system. Depending upon the state of the power management unit, a power control unit and a clock control unit are configured such that power may be applied or removed from certain components of the computer system and such that the frequencies of a CPU clock signal and a system clock signal may be raised or lowered. The power management unit includes a software configurable state register which allows system software, such as APM responsive software within the system BIOS, to control the state of the power management unit. When the power management unit is in a ready state during which the CPU clock signal and the system clock signal are driven at maximum frequencies and during which power is applied to all computer components, a time-out counter is activated to begin a first count down period. A system monitor monitors various circuit portions of the computer system during this period, and, if certain system activity is not detected, the power management unit enters a doze state upon lapse of the time-out counter. During the doze state, the frequencies of the CPU clock signal and the system clock signal are reduced and/or power is removed from selected inactive circuit portions.