The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 1996
Filed:
Aug. 02, 1993
Applicant:
Inventor:
Mikio Takashi, Tokyo, JP;
Assignee:
Oki Electric Industry Co., Ltd., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
395405 ; 39542103 ; 395450 ; 395375 ; 395484 ; 364D / ; 3642433 ;
Abstract
Instruction memories and a data memory are connected to a bus master which inputs or outputs an address signal and a data signal. The instruction memories are interleaved and are driven by a predicted address. The predicted address is retained upon accessing the data memory. As long as instruction codes are consecutive and addresses are not changed intentionally, effects of the interleaved arrangement can be shown even where a data area exists in the instruction codes.
Takashi, Mikio. (1996). Memory controller having bus master for addressing instruction memories (U.S. Patent No. 5504871). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5504871
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile