The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 1996
Filed:
Sep. 02, 1993
Steve I Chaney, Pleasanton, CA (US);
Micrel, Inc., San Jose, CA (US);
Abstract
A switching circuit has a pull-up FET and a pull-down FET coupled to a load circuit, each FET having a control terminal coupled to a current regulating circuit. The current regulating circuit provides a high predetermined current for a relatively short duration to the gates of the FETs to quickly turn on or turn off the FETs. After the short duration, a low quiescent current is applied to the gates to maintain the FETs in their present states. An inhibiting circuit, coupled between the pull-up FET and the pull-down FET, detects the states of the FETs and delays turn-on of one FET until the other FET has turned off. An overcurrent circuit monitors a current through a switching FET and turns off the FET after a predetermined time delay when an overcurrent condition is detected. The overcurrent circuit then turns on the FET after another predetermined time delay.