Pll-based method and apparatus for generating video drive signals from

Abstract

Various video signals provide horizontal sync pulses for generating a horizontal drive signal only during a horizontal sync portion and part of the vertical sync portion of a video signal. The invention generates a horizontal drive signal in the absence of horizontal sync pulses through the use of a phase locked loop (PLL) connected in feedback to horizontal counter logic. The counter logic receives pulses from the phase locked loop and at a predetermined count generates a horizontal drive signal. During the horizontal sync portion of the video drive signal, the frequency of the phase locked loop is determined by a time difference between a second signal derived directly from a horizontal sync pulse and a first signal generated by a predetermined count. The horizontal drive signal is thus synchronized to the horizontal sync pulses. During the vertical sync portion of the video signal, when horizontal Sync pulses may be absent, a vertical counter logic generates a vertical gating pulse that selects between the horizontal sync pulse and a delayed version of the first signal as the second signal to the PLL. The time difference between the first and second signals is approximately the same during both the horizontal and vertical sync portions, thereby keeping the horizontal drive signal roughly synchronized until horizontal sync pulses are again present.