The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 1996

Filed:

Sep. 30, 1994
Applicant:
Inventors:

Kaushik Popat, Pleasanton, CA (US);

William Ip, Saratoga, CA (US);

David Sherman, Fremont, CA (US);

Assignee:

Cirrus Logic, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 87 ; 326 57 ;
Abstract

Voltage pullup or pulldown devices of general purpose input/output pads of integrated circuit chips are controlled by signals derived from a core of the chip and which indicate (1) if the pad is to be enabled to output a value and (2) the value of the signal to be outputted. Such devices are controlled to supply different current levels to the input/output terminals as a function of whether the chip is operating in 'sleep' and interrupt modes. The device of each pad is disabled when signals or commands are supplied via the pad from the chip to circuitry external to the chip and vice versa.


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