The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 1996
Filed:
Jul. 19, 1993
Toshiaki Ueno, Yokohama, JP;
Shigeru Nakagawa, Kawasaki, JP;
Hewlett-Packard Company, Palo Alto, CA (US);
Abstract
The invention is intended to offer a signal selector circuit and a signal-generating circuit which are excellent in linearity between input and output signals at high frequencies and in isolation between input signals and isolation between output signals and which do not produce distortion. When an output signal is taken from OUT.sub.1, a circuit connected with the gate terminal of Q.sub.11 is made to have a high impedance, and a cutoff voltage deeper than the pinchoff voltage is applied to the gate of Q.sub.12. With respect to each of Q.sub.11, Q.sub.12, the gate is connected with the source by R.sub.11 or R.sub.12. Both Q.sub.11 and Q.sub.12 have depletion characteristics. The resistances of R.sub.11 and R.sub.12 are lower than the impedances of Q.sub.15 and Q.sub.16 when they drive the gates so as to turn on Q.sub.11 and Q.sub.12. In this case, therefore, the voltage between the gate and the source of Q.sub.11 is made null and Q.sub.11 conducts. Q.sub.12 is cut off. The voltage between the gate and the source is zero or maintained at a constant value irrespective of the state of the passing signal. Hence, self-modulation which would have been encountered in the prior art techniques can be prevented.