The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 1996
Filed:
Aug. 29, 1994
Kiyokazu Moriizumi, Kawasaki, JP;
Mikio Nishihara, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
In a circuit arrangement for a multilayer printed circuit board, a first circuit layer is formed on a substrate, and comprises a dielectric layer having a circuit pattern formed thereon. A second circuit layer is further formed on the first circuit layer, and comprises a dielectric layer having a circuit pattern formed thereon. The first circuit pattern includes conductive segments having only an X-directional component, and the second circuit pattern includes conductive segments having only an Y-directional component perpendicular to the X-directional component. Electric connections between the X-directional segments and the Y-directional segments are suitably established by vias provided in the second layer. The first circuit pattern further includes slant conductive segments having both the X- and Y-directional components and arranged in a blank zone not occupied by the X-directional segments, and the second circuit pattern further includes slant conductive segments having both the X- and Y-directional components and arranged in a blank zone not occupied by the Y-directional segments. Electric connections between the slant segments of the first pattern and the slant segments of the second pattern are suitably established by vias provided in the second layer.