The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 1996

Filed:

Nov. 18, 1994
Applicant:
Inventor:

Kazuyoshi Uemura, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257666 ; 257664 ; 257662 ;
Abstract

It is an object of the present invention to provide a molded semiconductor device which allows its package to be mounted on an external circuit even if the width of the conductor of a high-frequency signal transmission line on a packaging substrate of an external circuit is large, when the molded semiconductor device is to be connected to the external circuit. A semiconductor chip 3 is mounted on a first metal member 2 by mounting solder of AuSn or the like by bonding. The semiconductor chip 3 has a high-frequency signal terminal connected to a second metal member 1 by a metal wire 4 of Au or the like by bonding. The second metal member 1 is branched in a mold area 6 into two central conductors 1a, 1b which extend out of the mold area 6. The first metal member 2 has two ground conductors 2a, 2b which are disposed one on each side of the central conductors 1a, 1b. If an existing semiconductor package has a lead pitch P and a lead width M, then the distance L.sub.2 between the ground conductors 2a, 2b may be determined by (3.times.P-M), and is typically 1.73 mm. Since the distance L.sub.2 is greater than the width B (1.3 mm) of a conductor 10 on a packaging substrate of an external circuit, the central conductors 1a, 1b can be mounted on the conductor 10 on the packaging substrate.


Find Patent Forward Citations

Uemura, Kazuyoshi. (1996). Molded semiconductor device (U.S. Patent No. 5495125). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5495125

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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