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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 5493486 B1

PDFFull Text
Date of Patent:
Feb. 20, 1996

Filed:

Mar. 17, 1995

High efficiency compact low power voltage doubler circuit

Applicant:
Inventors:

Lawrence E Connell, Naperville, IL (US);

Anthony F Keller, Chicago, IL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:

Cunningham; Gary J.

Mancini; Brian M.

Primary Examiner:

Peter S Wong

Assistant Examiner:

Adolf Berhane

Int. Cl.
CPC ...
H02M / ;
U.S. Cl.
CPC ...
363 60 ; 307110 ;
Abstract

What is described is a high efficiency voltage doubler (100). The high efficiency voltage doubler (100), has a charge-pump capacitor (30), an inverter (18), a coupling capacitor (24), a complementary switch pair (16), a DC biasing circuit (102), a charging circuit (106), and an input circuit (108). This structure is adapted for use in an integrated circuit, and provides the advantage of maximizing voltage doubled power output and minimizing current consumption with a minimal number of components.

Find Patent Forward Citations

Connell, Lawrence. (1996). High efficiency compact low power voltage doubler circuit (U.S. Patent No. 5493486). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5493486

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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