The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 1996

Filed:

Feb. 21, 1995
Applicant:
Inventors:

Masafumi Shimotashiro, Osaka, JP;

Kiyokazu Hashimoto, Osaka, JP;

Yoshio Higashida, Osaka, JP;

Koichi Hayashi, Takamatsu, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D / ; H04L / ;
U.S. Cl.
CPC ...
375375 ; 375293 ;
Abstract

A timing recovering apparatus comprises an equalizer for equalizing a digital data signal subjected to interleaved NRZI such that the digital data signal has partial response (1, 0, -1), two comparators for comparing the equalized data signal with two different reference levels, two phase comparing portions for detecting phase difference between the outputs of the comparators and a reproduced clock signal separately, an adder for summing the outputs of the phase comparators, and a VCO for generating the reproduce clock signal in accordance with the output of the adder. This timing recovering apparatus performs phase comparing with two different phase comparators and PLL control is performed on the sum of the outputs of the two different phase comparators, so that the clock signal is not affected by data pattern of the data signal. An automatic slice apparatus comprises the equalizer for equalizing a digital data signal subjected to interleaved NRZI, and two comparators supplied with reference levels, and the timing recovering apparatus, detects amplitude of the output of the equalizer in response to the reproduced clock signal to compensate the reference levels.


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