The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 1996
Filed:
Apr. 04, 1994
Hitonobu Furukawa, Neyagawa, JP;
Hayami Matsunaga, Hirakata, JP;
Yoshikazu Suehiro, Ikoma, JP;
Masao Iwata, Hirakata, JP;
Takeo Yasuho, Neyagawa, JP;
Izumi Okamoto, Osaka, JP;
Kazuo Takeda, Kyoto, JP;
Shuji Ida, Osaka, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A plurality of memory modules are stacked so as to form a multilayer integrated memory circuit. All of the memory modules have a plurality of bare memory IC chips mounted thereon, and have the same structure, the same circuit configuration and the same terminal arrangement in lead frames with each other. Each of the memory modules to be stacked in each layer is rotated by 90.degree., 180.degree. or 270.degree. before being stacked and connected to each other. Thus, in the multi-layered memory circuit, it is possible that signals can be selectively input/output to/from a particular layer in the multilayer structure, although the lead terminals of each of memory modules has the same configuration and the same arrangement with each other. As a result, a small-size integrated memory circuit device with a large memory-capacity can be provided, which can be fabricated easily and efficiently. A higher processing speed of digital computers can be also achieved.