The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 1996

Filed:

Nov. 18, 1994
Applicant:
Inventors:

Vance Risinger, Van Alstyne, TX (US);

James C Spurlin, Sherman, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327108 ; 326 83 ; 327530 ;
Abstract

An output driver circuit for use with low voltage level, high speed data transmission busses which require slew and skew control of the output voltage transitions. An open collector output transistor has a controlled slew rate for both the high to low and low to high output transitions. The slew rate control is provided by controlling the slew rate of the base voltage of the output transistor in response to an input transition. A slew rate control circuit coupled to the output transistor includes a current source powered by a high stability bias generator, one or more output feedback circuits, an output level compensation circuit, and a base discharge circuit. The current source controls the amount of current available at the base of the open collector output transistor. The feedback circuits are used to control the initial voltage at the base of the output transistor, and the slew rate for the rising voltage at the base of the output transistor. The output level compensation circuit is used to vary the current into the base of the output driving transistor when the low output voltage level crosses certain predetermined thresholds. The discharge circuit is used to control the rise time when the output voltage transistors from a low to a high output level. The resulting circuit has a fast transition time in response to an input transition combined with a tightly controlled slew rates and skew. The output driver circuit described can meet the proposed specifications for the low voltage level, fast transition busses currently being developed.


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