The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 1996
Filed:
Feb. 04, 1994
James L Gates, Lake Oswego, OR (US);
Hughes Aircraft Company, Los Angeles, CA (US);
Abstract
A 3-dimensional circuit assembly includes a lower substrate, a first integrated circuit (IC) layer that is adhered to and electrically insulated from the substrate, electrical contacts for the IC layer, and separate electrical contacts for the substrate that extend through and are insulated from the IC layer. The IC layer is surmounted by an insulating layer through which the electrical contacts also extend, and across which interconnections between different contacts may be made. The IC layer and substrate are held together by an adhesion layer, with the adhesion, IC and insulating layers all being thin enough to assume the coefficient of thermal expansion for the underlying substrate, which is much thicker. The substrate may itself have a second IC layer to which contacts are made, or it may be implemented as the photodetector of a focal plane array. Two standard wafers are used to form the package, with the substrate for the upper wafer removed either before or after bonding to the lower wafer. Additional IC layers may be added by adding additional wafers in a similar fashion.