Register conflict scoreboard in pipelined computer using pipelined

Abstract

A data dependency scoreboard for a pipelined digital computer includes a source counter and a destination counter for each general purpose register (GPR). The source counter for each GPR is incremented each time that a specifier is decoded that specifies the use of the source counter's GPR as a source operand. The source counter is decremented each time that an execution unit reads a source operand from the source counter's GPR. The destination counter is incremented each time that a specifier is decoded that specifies the use of the counter's GPR as a destination operand. The destination counter is decremented each time that the execution unit writes to the destination counter's GPR. A data dependency conflict causing a complex specifier unit to stall occurs when operand processing requires a write to a GPR that has a source counter value greater than zero, and when operand processing requires a read of a GPR that has a destination counter value greater than zero. Source and destination counts from the data dependency scoreboard for a GPR referenced by a complex specifier being processed, for example, are pipelined through down counters in the complex specifier unit, and the counts are updated in the complex specifier unit as the execution unit reads source operands from the GPR and writes to the GPR.