The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 1996

Filed:

Apr. 18, 1994
Applicant:
Inventors:

Kyeong-Rae Kim, Suwon, KR;

Seung-Kweon Yang, Seoul, KR;

Hee-Choul Park, Suwon, KR;

Du-Eung Kim, Yongin, KR;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523006 ; 36523003 ;
Abstract

A decoding circuit and method for a semiconductor memory device simplifies a decoding process by individually performing a large block decoding and small block decoding operations, and thereby reduces the total time delay taken in an address decoding process and layout area occupied by decoding circuits. The decoding circuit for a semiconductor memory device having a memory cell array including a plurality of large blocks, each large block including m small blocks (wherein m=2,3, . . . ) and having a plurality of memory cells being arranged in a matrix form, and a plurality of reading/writing circuits each corresponding to said large blocks, includes a first decoding circuit for receiving a first address to simultaneously select respective specific small block in each of the large blocks, corresponding to the first address, and a second decoding circuit for receiving a second address to enable a selected one of the reading/writing circuits corresponding to said second address.


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