The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 1996

Filed:

Nov. 29, 1993
Applicant:
Inventors:

Oded Yishay, Austin, TX (US);

Joseph Jelemensky, Austin, TX (US);

Ann E Harwood, Austin, TX (US);

Javier Saldana, Austin, TX (US);

Assignee:

Motorola Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395280 ; 395550 ; 395800 ; 395410 ; 36518902 ; 36523002 ; 364D / ; 3642329 ; 364238 ; 364240 ;
Abstract

Method and apparatus for performing multiplexed and non-multiplexed bus cycles in a data processing system (10). The present invention allows a data processing system (10) to switch from multiplexed bus cycles to non-multiplexed bus cycles, and vice-versa, without requiring the data processing system (10) to be reset. In one embodiment of the present invention, a single user programmable control bit (90) is used to select whether an external bus cycle will be multiplexed or non-multiplexed. In more complex embodiments of the present invention, the ability to switch between multiplexed external bus cycles and non-multiplexed external bus cycles may be achieved by way of a plurality of user programmable register fields (96, 100, 102, and 104) located in registers 44. The plurality of user programmable register fields (96, 100, 102, and 104) may be associated with one or more chip select signals.


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