The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 1996
Filed:
Mar. 21, 1994
Robert G McKenna, Houston, TX (US);
Michael G Baxter, Garland, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An apparatus and method are disclosed that prevent the breakage of semiconductor wafers that have not been entirely sawed, during the process of removing dicing tape from the back of the wafer. In addition, an improved semiconductor demounter is disclosed that allows optimum positioning of the semiconductor wafer for removal of the dicing tape. The apparatus for preventing breakage of semiconductor wafers consists of a leveling block 32 for use with a semiconductor demounter 16 having an incline 18 leading up to a tape removal apparatus 20. The leveling block 32 comprises an declined plane 34 with an angle of declination 36 approximately equal to the angle of inclination 26 of the incline leading up to the tape removal apparatus 20. The declined plane 34 rests on top of the incline 18 leading up to the tape removal apparatus 20, thereby forming a substantially level surface leading into the tape removal apparatus 20 and allowing the dicing tape 12 to be removed from the surface of a semiconductor wafer 10 while reducing the likelihood of breaking the wafer 10. The leveling block 32 includes one or more fastening points 38 for affixing the block to a semiconductor demounter.