The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 1996
Filed:
Mar. 14, 1994
John D Hamre, Plymouth, MN (US);
Network Systems Corporation, Minneapolis, MN (US);
Abstract
A jitter measurement system for a serial digital data link includes a clock recovery element effective to separate a clock signal from the digital data bits being transmitted. The clock signal is applied first to a programmable delay element whose output is applied to as a first input to a decision circuit. The second input to the decision is the serial data stream. The relation of the data to the clock is initially set so that the clock is sampling the data at approximately the transition point of the data. Depending on the exact location of the data relative to the clock signal, the result of the sampling process will yield one of two results. First, if the data transition occurs before the clock transition, no error results. However, if the clock transition occurs before the data transition, an error results. An error ratio detector circuit determines an error ratio which is compared to a predetermined reference. If the reference is exceeded by error ratio, the delay of the programmable delay circuit is adjusted in a closed loop fashion to make the error ratio correspond to the predetermined allowable error rate.