The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 1996
Filed:
Sep. 28, 1992
Munehiro Ogawa, deceased, late of Kumamoto, JP;
Masato Iwabuchi, Akishima, JP;
Hitoshi Sugihara, Koganei, JP;
Saburo Hojo, Takasaki, JP;
Masami Kinoshita, Hidaka, JP;
Osamu Yamashiro, Tokorozawa, JP;
Goichi Yokomizo, Tokyo, JP;
Mikako Miyama, Hachioji, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A mixed mode simulation method and apparatus are provided for highly accurately simulating the total characteristics of a digital analyzed circuit portion and an analog analyzed circuit portion, which are both subjected to mixed mode simulation, in consideration of the influence exerted on the analog analyzed circuit portion by a current consumed by the digital analyzed circuit portion. More particularly, a current value of an equivalent circuit for current calculation modeled for providing the analog analyzed circuit portion with a current generated due to an operating state of the digital analyzed circuit portion realized by logic simulation is determined in synchronism with the logic simulation, and the equivalent circuit for current calculation derived thereby is composed with the analog analyzed circuit portion, and this composite circuit is subjected to circuit simulation.