The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 1996
Filed:
Jul. 20, 1994
Mark E Jacobs, Dallas, TX (US);
Vijayan J Thottuvelil, Richardson, TX (US);
Kenneth J Timm, Rockwall, TX (US);
AT&T Corp., Murray Hill, NJ (US);
Abstract
An isolated MOSFET gate drive includes circuitry to provide a negative gate bias during the off time of the MOSFET to enhance its immunity to inadvertent turn-on. The bias is generated by a self contained two terminal passive network which may be 'floated' at any potential with respect to ground. This bias is automatically generated through the action of the network to the gate drive waveform, eliminating the need for an external bias supply to provide this voltage. The bias supply is located locally, thus eliminating the need for long interconnects which may interfere with circuit operation. The bias network in one implementation is a combination of a capacitor and non-linear semiconductor device with a fixed voltage breakdown characteristic. This two-component implementation maintains the capability of producing systems with high packaging densities.