Computer-aided method of designing a carry-lookahead adder

Abstract

Using a computer-aided method to design carry-lookahead adders to add two binary numbers and an input carry bit. In the first preferred embodiment, a length-number and a blocks-in-group number are entered into the computer by a user. The computer, responding to the length-number automatically designs a first structure with a plurality of logic blocks. Using the blocks-in-group number entered, the computer designs a second structure specifying the number of preceding-level logic blocks to be grouped into next-level logic blocks. Then, the computer automatically designs one or more next-level logic blocks. The first structure receives the binary numbers and produces the propagate and the generate bit. The logic blocks in the second structure receive bits from preceding-level logic blocks and operate on bits in parallel to produce the output carry bit of the adder. Based on the few numbers entered, the computer formulates the logic circuits to produce the output-carry bit and the sum bits of the adder. In a second preferred embodiment, the output-carry bit is formed with some rippling of the carry bit from one block to the next.