The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 1995

Filed:

Jun. 06, 1994
Applicant:
Inventors:

Donald J Verhaeghe, Colorado Springs, CO (US);

Gregory M Smith, Colorado Springs, CO (US);

Assignee:

Ramtron International Corporation, Colorado Springs, CO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327553 ; 327379 ; 327198 ; 326 21 ;
Abstract

A filter circuit includes an input node for receiving an unfiltered input signal, an output node for providing a filtered output signal, and an intermediate node. An integrator has an input coupled to the input node and an output coupled to the intermediate node. A Schmitt trigger has an input coupled to the intermediate node and an output coupled to the output node. A reset circuit has a first input coupled to the input node, a second input coupled to the output node, and an output coupled to the intermediate node. The signal on the intermediate node is generated by integrating the unfiltered logic input signal if the input signal and the output signal are at opposite logic states. A filtered output logic signal is generated by conditioning the intermediate signal with the Schmitt trigger. The reset circuit resets the intermediate signal if the input signal and the output signal are each at a zero logic state or if the input signal and the output signal are each at a one logic state.


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