The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 1995

Filed:

Jun. 22, 1994
Applicant:
Inventors:

Peter Flohrs, Reutlingen, DE;

Christian Pluntke, Hechingen, DE;

Assignee:

Robert Bosch GmbH, Stuttgart, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257577 ; 257491 ; 257603 ;
Abstract

The invention relates to a monolithically integrated semiconductor arrangement, where from the first main surface a first zone (p) and a second zone (n.sup.+) are diffused into a substrate (2), which is weakly doped (substrate region n.sup.-) under a first main surface (3) and is more strongly doped (substrate region n.sup.+) under a second main surface (4). An insulating passivation layer is attached to the first main surface (3), on top of which a metallic cover electrode (D) is located, which covers adjacent substrate regions (n.sup.-) and the edge areas of the first zone (p) and the second zone (n.sup.+). In accordance with the invention, at least one additional zone (.nu.) of the same type of conductivity as the associated zone (n.sup.+), but with weaker doping, is diffused in for increasing the break-through voltage, and is connected to the zone (n.sup.+), does not contact the other zone (p) and prevents the zone (n.sup.+) from directly bordering the substrate (n.sup.-) underneath the cover electrode (D).


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