The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 1995

Filed:

Jul. 28, 1994
Applicant:
Inventors:

John P Gauci, Putnam Valley, NY (US);

Thomas A Kline, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B32B / ; B32B / ; B32B / ;
U.S. Cl.
CPC ...
156 89 ; 156247 ; 156323 ; 264 58 ; 264 61 ;
Abstract

A multilayer ceramic substrate with an internal cavity extending from the top to the bottom surface of the substrate is produced using an insert material which fits within a cavity defined by aligned openings of individual ceramic sheets in a multilayer stack. The multilayer stack of ceramic sheets, together with the insert, is press-molded together with the insert serving as an internal mold that maintains the internal dimensions of the cavity. The insert is slightly larger in its top to bottom dimension than the multilayer stack and is driven into a compressible material underlying the multilayer stack during the pressing operation. The insert prevents the ceramic from flowing upwards into the center of the cavity during the pressing operation. In addition, the insert embeds electrically conductive pads located at various levels inside the cavity on individual ceramic sheets in the multilayer stack into the top surfaces of the ceramic sheets. After molding, the insert and the compressible material are removed from the multilayer structure. The invention has a particular application for forming multilayer ceramic structures that are connected to an integrated circuit chip and heat sink combination that will be positioned inside the cavity of the ceramic structure.


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