The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 1995

Filed:

Dec. 27, 1994
Applicant:
Inventors:

Kiyoshi Okamoto, Osaka, JP;

Yoshifumi Matsumoto, Osaka, JP;

Masaki Toyokura, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364725 ; 364726 ; 395375 ;
Abstract

The output of a butterfly unit is entered into a product-sum unit in a forward DCT and the output of the product-sum unit is entered into the butterfly unit in an inverse DCT. The product-sum unit employs, as a bit-string distribution circuit, a register circuit having eight bit shift registers each having a 16-bit parallel input and a 2-bit shift output and the bit shift registers are different in bit width from one another. Data are entered into the bit shift registers with the largest bit-width bit shift register first, such that the respective bit shift registers are shifted rightward by 2 bits per cycle. Four shift registers are disposed between the bit-string distribution circuit and a RAG circuit such that, when bit strings are entered, as delayed cycle by cycle, into eight RAGs of the RAC circuit, the final accumulation results are successively provided from the RACs in a proper order. This reduces the bi-directional DCT processor in circuit arrangement.


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