The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 1995

Filed:

Jun. 27, 1994
Applicant:
Inventors:

Hachidai Nagase, Hadano, JP;

Tatsuki Ishii, Tokyo, JP;

Katsuyoshi Suzuki, Hadano, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364490 ; 364489 ; 364488 ;
Abstract

An interconnection path layout in a circuit structure having terminals arranged in rows, such as a semiconductor integrated circuit. Paths are first assigned to selected obstruction-free terminal pairs to be interconnected, and then bypasses are assigned to the remaining obstruction-existing terminal pairs to be interconnected. This minimizes the occurrence that the terminal pairs are left un-interconnected. Also, longer vertical paths are assigned to selected terminal pairs with priority. This prevents the reserved paths from becoming obstructions to vertical paths which are later assigned to selected terminal pairs.


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