The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 1995
Filed:
May. 23, 1994
Toshio Takeuchi, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A head positioning control device for a magnetic disk apparatus has a head selection circuit for selecting one of a plurality of magnetic heads based on an external head address, a servo control circuit for controlling a movement of a selected magnetic head to a prescribed position through a head positioning motor. A head positioning control unit sets prescribed control information in the servo control circuit based on an external instruction. A head address switching device is connected to the head selection circuit for receiving a head switching signal set by an external instruction, the head address and a burst-area information, and sending a prescribed head address to the head selection circuit. A sector pulse generator sends a sector pulse corresponding to a zone in which the magnetic head is positioned to the head address switching means. The head address switching means has a latch which, when a burst-area information is input, switches and outputs a head address input during an inputting of the burst-area information after the burst-area information becomes inactive. A first delay circuit outputs a signal flag indicating an existence of a head switching signal with the same timing as that of the head address output by the latch circuit. A second delay circuit outputs a signal flag indicating a completion of head address switching after a next burst-area information is read.