The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 1995
Filed:
Oct. 18, 1994
Bahram Ahanin, Cupertino, CA (US);
Janusz K Balicki, San Jose, CA (US);
Khusrow Kiani, Oakland, CA (US);
William Leong, San Francisco, CA (US);
Ken-Ming Li, Santa Clara, CA (US);
Bezhad Nouban, Fremont, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A programmable logic device has a number of dedicated global control input lines which interface directly with individual building blocks known as logic array blocks. These lines can be used for clocks, presets, clears, or output-enables. Other logic signal lines from the centrally located global interconnect array are selected through an array of multiplexers and then interface with the logic array block. A configuration array of multiplexers in the logic array block selects from among these inputs, generating local control input signals, the final functions of which are decided by further multiplexing at the macrocell level within the logic array block.