The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 1995

Filed:

Nov. 15, 1994
Applicant:
Inventors:

Takeshi Akatsuka, Niigata, JP;

Tsutomu Sato, Niigata, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437160 ; 437153 ; 437226 ; 437249 ;
Abstract

An efficient method is proposed for the preparation of a silicon single crystal wafer for discrete semiconductor devices, such as transistors, deeply doped with a dopant on one surface, the other surface being mirror-polished. Different from the conventional process in which a single base wafer is subjected to a deposition doping and drive-in doping treatments to form a deeply doped layer on each of the surfaces followed by removal of one of the doped layers and lapping and mirror-polishing the surface, the improvement of the invention can be obtained by subjecting a base wafer having an increased thickness to the deposition and drive-in doping treatments to form deeply doped layers on both surfaces leaving an undoped layer in-between followed by slicing this base wafer by using an annular slicing blade having a thickness specifically correlated to the thickness of the starting wafer along the undoped layer into two separate wafers each having a laminar structure consisting of a doped layer and an undoped layer which are each lapped and mirror polished on the surface of the undoped layer.


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