The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 1995
Filed:
Jun. 16, 1994
Marc R De Langhe, Sleidinge, BE;
Peter P Reusens, Laarne, BE;
Johan J Haspeslagh, Heverlee, BE;
Stefaan M Van Hoogenbemt, Mechlin, BE;
Alcatel N.V., , NL;
Abstract
A digital phase locked loop arrangement is used in a desynchronizer demapping a plesiochronous stream from a synchronous bitstream is disclosed to remove jitter due to overhead gapping from the plesiochronous stream. To this end the part of the synchronous bitstream constituting the plesiochronous stream is written into a buffer memory (BUFF), the write address (WRADDR) of which is incremented at the rate of this plesiochronous part. The read address (RDADDR) for the buffer memory (BUFF) is derived from the write address (WRADDR) in the digital phase locked loop arrangement. Herein, a negative feedback for byte justifications in the synchronous bitstream and a positive feedback for bit justifications therein is provided so that byte justifications give rise to a lower change in the incrementing rate of the read address (RDADDR) but of longer duration, whereas bit justifications give rise to an increased change in this incrementing rate but of shorter duration.