Pre-charge triggering to increase throughput by initiating register

Abstract

A pre-charge triggering technique used in connection with a synchronous pipeline stage (FIG. 1b) that includes an input register (11) that feeds a function section (12) with both non-pre-charged front-end logic (12a) and pre-charged function logic (12b). An output section (13) includes pre-charge control logic that activates a PRECHARGE line (21) to provide a PRECHARGE signal at the beginning of the pre-charge phase, i.e., at the end of the active phase. The input register is triggered (21) when the PRECHARGE line is switched active, before the next rising clock edge, so that the next active phase begins prior to the beginning of the next clock cycle, and prior to the end of the pre-charge phase of the current clock cycle (FIG. 1d). Throughput increase is obtained by initiating the next active phase at the beginning of the current pre-charge phase, passing input data to the non-pre-charged front-end logic while the pre-charged logic is still in the pre-charge phase, so that at least a portion of the pre-charge phase can be hidden in the propagation delay through the front-end.