The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 1995

Filed:

Jun. 24, 1993
Applicant:
Inventors:

Akihiro Nagatomo, Fukuoka, JP;

Hiroshi Yoshida, Fukuoka, JP;

Masaki Nishiyama, Fukuoka, JP;

Seiichi Oshima, Fukuoka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257691 ; 257692 ; 257693 ; 257723 ;
Abstract

In a semiconductor power module, a surge voltage on a power source line of a semiconductor element for electric power control is restrained. A power source terminal PS(NP) is comprised of power source terminals PS(P) and PS(N) which are arranged adjacent each other through an insulative sheet INS1 made of insulative synthetic resin or the like. The power source terminals PS(P) and PS(N) are each formed by a conductive plate and respectively transmit a positive and negative power source potentials. The thickness of the insulative sheet INS1 is 0.5 mm to 1.5 mm, for instance. A reduction is made in a parasitic inductance which is present in the power source line which extends from the power source terminal PS(P) to the power source terminal PS(N) through the semiconductor element for electric power control, thereby suppressing a surge voltage which is developed between the power source terminal PS(P) and the power source terminal PS(N).


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