The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 1995
Filed:
Oct. 06, 1994
Masao Kunitou, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A fabrication method of a semiconductor memory device in which the punch-through phenomenon is difficult to occur in uncoded or unwritten memory cells. First impurity-doped regions for coding are formed in channel areas of selected ones of first MOS transistors in the memory cell area, using a patterned photoresist film as a mask, respectively. Second impurity-doped regions for threshold adjustment are formed in channel areas of unselected ones of the first transistors and second transistors in the peripheral circuit area, using a patterned photoresist film as a mask, respectively. During the process of forming the second impurity-doped regions, the dopant doped for threshold adjustment through the selected ones of the first transistors into the substrate forms third impurity-doped regions apart from the channel areas of the selected ones of the first transistors, respectively. The third impurity-doped regions serve to restrain the first dopant doped into the selected ones of the first transistors from laterally diffusing in the substrate, preventing the punch-through phenomenon.