The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 1995

Filed:

Mar. 17, 1994
Applicant:
Inventors:

Koki Tanoue, Yokohama, JP;

Tsuneshi Yokota, Kawasaki, JP;

Tomohisa Yoshimaru, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
369 50 ; 369 47 ; 369 48 ; 369 58 ; 369 32 ;
Abstract

An optical disk apparatus records data on an optical disk or reproduces data therefrom. The optical disk has a plurality of zones each including a plurality of tracks, and the optical disk apparatus records or reproduces data with respect to the zones on the basis of clock signals having different frequencies. The optical disk apparatus comprises first and second phase comparators. The first phase comparator is a pull-in type and outputs a signal corresponding to the phase difference between a clock signal generated by a PLL circuit and a binary signal of reproduction data. The second phase comparator is a lock-in type and outputs a signal corresponding to the phase difference between a signal obtained by frequency-dividing the clock signal generated by the PLL circuit and a signal obtained by frequency-dividing a fundamental clock signal. When data is to be recorded or when the timings at which the PLL circuit outputs clock signals are not appropriate, the clock signals of the PLL circuit are processed by a voltage controlled oscillator in accordance with a signal supplied from the pull-in type first phase comparator. When data is to be reproduced, the clock signals of the PLL circuit are processed by the same voltage controlled oscillator in accordance with a signal supplied from the lock-in type second phase comparator.


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