The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 1995
Filed:
Sep. 14, 1994
Applicant:
Inventors:
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523008 ; 36518905 ;
Abstract
An internal address signal is outputted quickly by connecting nMOS transistors in series to inverters forming a latching circuit of a row address buffer circuit, applying an external row address signal to the gate of a nMOS transistor, applying a delayed activation signal .phi.2 to the gate of the nMOS transistors, grounding the gate of the nMOS transistor, triggering nMOS transistors into complete conduction by the delayed activation signal .phi.2 to reduce the ON resistance. A column address buffer circuit receives a ZCAS circuit by an NOR gate, and an external column address signal by an NAND gate during standby, to prevent a flow of a through current.