The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 1995

Filed:

Feb. 08, 1994
Applicant:
Inventors:

William W Drabenstadt, Camp Hill, PA (US);

Richard C Fowler, East Berlin, PA (US);

Soren Grinderslev, Hummelstown, PA (US);

Robert D Irlbeck, Greensboro, NC (US);

Assignee:

The Whitaker Corporation, Wilmington, DE (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R / ; G01R / ;
U.S. Cl.
CPC ...
324758 ; 439 68 ; 439 73 ; 439 83 ;
Abstract

The invention relates to testing apparatus, such as the type known as a burn-in test socket for integrated circuit 'chips', where the chips are essentially planar electronic devices having a plurality of chip leads or traces, laterally projecting therefrom, for electrical interconnection to complementary traces on a planar electronic device, such as a mother board, upon which the socket may be mounted, during testing. The socket comprises a frame member for mounting to the planar electronic device, where the frame member includes electrical means for engaging chip leads and applying electrical current thereto during testing. A second element of the socket is a two-piece, adjustable cover member consisting of first and second members floatably mounted together by plural compression springs, where the first and second members are axially movable relative to one another. Specifically, the first member includes a force generating surface to apply a uniform force on the chip leads in contact with said complementary traces, while the second member, overlying the first member, includes at least a pair of latching members adapted to secure the cover member to the frame member during chip testing.


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