The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 1995
Filed:
Apr. 28, 1994
Takayuki Harima, Kawaguchi, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
There is provided a semiconductor device having a wiring configuration which can suppress an increase in the delay time of a wiring extending over the memory cell area even if the cell size is reduced. Wirings of preset wiring length are formed over a semiconductor substrate. A wiring of wiring length larger than that of the former wirings is formed over the former wirings with an inter-level insulation film disposed therebetween and the width of the latter wiring is made large. Thus, the wiring resistance is reduced and the wiring delay time can be effectively reduced. The semiconductor device is applied to a semiconductor memory or the like in which cell selection is made by use of the hierarchical structure such as a duplex word line system.