Level shifter and data output buffer having same

Abstract

A level shifter and a data output buffer adapted for use in a semiconductor memory device including a memory cell for storing data, a sense amplifier for amplifying data read from the memory cell and generating an ECL-level output signal, and a level shifter for converting the ECL-level output signals into a CMOS-level signal, wherein the level shifter has a level shifting means receiving the ECL-level data signals, converting the input data to CMOS-levels, and outputting a result, and a delay for delaying the result so as to control its current consumption of the level shifter.