The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 1995

Filed:

Oct. 05, 1994
Applicant:
Inventor:

Shing I Kong, Menlo Park, CA (US);

Assignee:

Sun Microsystems, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395417 ; 364D / ; 3642563 ; 3642564 ; 3642592 ; 3642597 ; 395416 ; 3954211 ; 39542111 ;
Abstract

A memory management unit for translating a virtual address into a corresponding physical address including a translation lookaside buffer and a comparator. The translation lookaside buffer includes a plurality of entries, each of the entries having a first number of bits to indicate a virtual page number, a second number of bits to indicate an offset into the page, a third number of bits to indicate either a portion of a page number or a portion of an offset value, a fourth number of bits to indicate a page size, and a fifth number of bits for storing a physical address of a page of memory. The comparator compares a number of bits equal to the virtual page size of a virtual address presented to the translation lookaside buffer with the virtual addresses stored in entries of the translation lookaside buffer. If the result of the comparison produces a match/hit, the physical address is concatenated with the bits of the second and third number of bits using the stored page size to provide a physical address. When the comparison produces a miss, an assumed page size is used to access a table in memory from which the physical addresses may be derived.


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