Pipelined analog-to-digital converter with curvefit digital correction

Abstract

An ADC system in which raw ADC data is received and digitally manipulated to increase the accuracy of the resultant digital output word. In one embodiment, the digital manipulation of this invention is performed on data which has been preliminarily adjusted for errors caused by use of an interstage gain less than ideal. In one embodiment, digital correction is performed based only on the errors of a plurality of most significant bit stages, rather than all stages, as the effect on error of the digital output word is of decreasing importance for stages of less significance. In accordance with one embodiment of this invention, offset error and full scale error are determined by applying .+-.Vref as an input signal to the ADC. These values allow the raw digital data from the ADC to be compensated in either hardware or software to provide a more accurate digital representation of the analog input voltage being measured. In accordance with another embodiment of this invention, second order errors are removed by determining the magnitude of, for example, capacitor value voltage coefficients of the MSB stage of the ADC after calibration of lesser significant bit stages, and using these voltage coefficients to further adjust the digital output word, providing an even more accurate digital representation of the analog input signal being measured.