The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 1995

Filed:

Sep. 23, 1992
Applicant:
Inventors:

Michael T Benhase, Tucson, AZ (US);

Brent C Beardsley, Tucson, AZ (US);

William G Sherman, II, Tucson, AZ (US);

Adalberto G Yanes, Tucson, AZ (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
395481 ; 3642141 ; 3642421 ; 3649405 ; 364D / ; 364D / ; 3642302 ; 395700 ; 395735 ; 395867 ;
Abstract

A method and system for enhancing the efficiency of communication between multiple direct access storage devices and a storage system controller in a data processing system. In a data processing system having a storage system controller connected between a plurality of host computers and a plurality of storage devices, a processors, within the storage system controller, is provided for controlling the storage devices. Commands and data are communicated between the processor and the storage devices over a communication channel. An independent polling mechanism is provided which is coupled to the communication channel and the processor. The independent polling mechanism is utilized for collecting and storing interrupt status data from each of the storage devices. An interrupt circuit coupled to the independent polling mechanism is then utilized to produce an interrupt signal at the processor, in response to the state of the interrupt status data collected from the storage devices, wherein the polling of the storage devices by the processor is not required. By utilizing an independent polling mechanism the manner in which the storage devices are polled may be selectively controlled such that only selected storage devices are polled, only selected interrupt status conditions are recognized, or periodic interrupt signals are generated regardless of the status of the storage devices.


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