The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 1995

Filed:

May. 18, 1993
Applicant:
Inventors:

Hiroshi Kimura, Yokohama, JP;

Shoichi Miyazawa, Yokohama, JP;

Ryutaro Horita, Yokohama, JP;

Kenichi Hase, Yokohama, JP;

Akihiko Hirano, Fujisawa, JP;

Akira Uragami, Sawa, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
360 65 ; 360 46 ;
Abstract

A magnetic disk system which records and reproduces data on a magnetic disk at different data transfer rates depending on a track position on the disk includes a transversal waveform equalizing circuit which implements an optimal waveform shaping for a readout waveform. The waveform equalizing circuit consists of a register, a frequency synthesizer, a PLL, and a transversal circuit. The transversal circuit consists of variable delay circuits, variable gain amplifiers, and an adder. The frequency synthesizer produces a write clock signal having a frequency which corresponds to a value stored in the register which depends on the data transfer rate, and the PLL responds to the write clock signal to produce a control signal by which the delay time of the transversal circuit is controlled. Consequently, the delay characteristic is not affected by disparity of circuit components of the transversal circuit, and the write clock frequency and the delay time of the transversal circuit can be set to intended values by merely changing the value stored in the register in response to a variation of the data transfer rate.


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