Semiconductor integrated circuit incorporated with substrate bias

Abstract

The semiconductor IC according to this invention comprises an internal circuit including a plurality of transistors formed on a P-type or an N-type substrate (or a well) which carries out a prescribed signal processing operation during the time of operation mode, a standby detection circuit which generates a standby detection signal of active level by detecting standby mode, a bias potential generating circuit which generates a forward bias potential from the substrate (well) of the transistor to the source electrode, and a switching circuit which supplies to the substrate (well) the potential of the source electrode and the bias potential in response to the active level and the inactive level, respectively, of the standby detection signal. At the time of the operation mode, a high speed operation is secured by bringing the transistors to a low threshold voltage by receiving the supply of the bias potential, while at the time of the standby mode, the generation of malfunctions and defective data holding are prevented and the power consumption is saved by raising the threshold voltage of the transistors through a halt of supply of the bias voltage to the substrate (well).