The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 1995
Filed:
Jul. 28, 1994
Eric B Schorn, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method is provided which includes a set of N and P type transistors connected such that both positive active and negative dynamic logic input pulses may be received. The pulse catcher circuit of the present invention then outputs a static logic level based upon the input pulses. A first input circuit is included that receives the data signal and outputs a level (voltage or absence of a voltage) to an output invertor circuit which is used in conjunction with a feedback circuit as a latch to maintain the output at the desired level. The feedback circuit ensures that the level will be maintained in a stable state (i.e. ground potential for a logical '0' and Vdd for a logical '1'). In this manner the static logic levels output from the circuit will be maintained until another dynamic pulse is received. Additionally, the pulse catcher circuit will always provide a consistent static logic output, even when both of the dynamic logic input signals are in their active states.