The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 1995

Filed:

Aug. 11, 1993
Applicant:
Inventors:

Bin Guo, Fremont, CA (US);

Jim Kubinec, Reno, CA (US);

Eugen Gershon, Los Gatos, CA (US);

Assignee:

Advanced Micro Devices Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D / ;
U.S. Cl.
CPC ...
375373 ; 375232 ; 375371 ; 375375 ; 327-9 ; 327-2 ;
Abstract

An on-chip digital servo scheme for providing continuous calibration of integrated circuit on-chip time delay devices to provide real-time regulation against various parameter or environmental changes, such as processing, temperature and power supply variations. The techniques are particularly useful for semiconductor delay lines comprised of a selectable number of identical unit delay circuits having the same propagation time. This scheme constantly monitors the delay changes in the unit delay elements and calibrates the delay line by comparing the delay against a stable, crystal controlled reference clock period to determine, in each instance, how many unit delay elements in the delay line is needed to effectively delay the amount of time to equal the reference clock period. A real time digital pointer number is generated and updated while the device is in operation. This pointer can be used to inform or update other delay or time bases on the same integrated circuit substrate which are constructed from the same type of unit delay cell and which may choose to use a different number of unit delay cells. Accordingly, this scheme can then be used for various delay regulation purposes in and all-digital circuit, such as clock multiplication, pulse width regulation, and other applications where accurate, regulated, digital command controlled delay or time bases are needed.


Find Patent Forward Citations

Guo, Bin. (1995). All digital on-the-fly time delay calibrator (U.S. Patent No. 5457719). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5457719

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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