The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 1995
Filed:
Nov. 23, 1994
Wai-Bor Leung, Wescosville, PA (US);
AT&T Corp., Murray Hill, NY (US);
Abstract
A field programmable gate array (FPGA) which verifies that an incoming bitstream is intended for it prior to writing configuration data to programmable memory cells is described. The bitstream has an identification frame which includes an identification code for the targeted FPGA. A verification circuit in a memory controller verifies whether the bitstream is intended for the FPGA based upon the identification code. If the bitstream is intended for the FPGA, the configuration data is processed and stored in the programmable memory cells. If the bitstream is not intended for the FPGA, the FPGA may enter a standby mode, and the configuration process may be halted until a user resets the FPGA. The verification circuit can help prevent damage that may occur to the FPGA when bitstreams intended for a different size memory cell array are received by the FPGA.