The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 1995

Filed:

Jan. 10, 1995
Applicant:
Inventors:

Donall G Bourke, Boca Raton, FL (US);

Douglas R Chisholm, Delray Beach, FL (US);

Gregory D Float, Vestal, NY (US);

Richard A Kelley, Coral Springs, FL (US);

Roy Y Liu, Vestal, NY (US);

Carl A Malmquist, Vestal, NY (US);

John M Nelson, Apalachin, NY (US);

Charles B Perkins, Jr, Endicott, NY (US);

Richard L Place, Vestal, NY (US);

Hartmut R Schwermer, Stuttgart, DE;

John D Wilson, Endwell, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
395285 ; 395308 ; 395306 ; 395288 ; 395726 ; 364935 ; 3649354 ; 36493543 ; 36493545 ; 36493546 ; 364D / ;
Abstract

In a data processing system, an input output bus unit (IOBU) is connected to one end of an input output interface controller (IOIC) via an asynchronous bus. The other end of the IOIC is connected to a storage controller (SC) and an input output interface unit (IOIU) via a synchronous bus. The SC and IOIU are connected to a memory unit and an instruction processing unit. The asynchronous bus, which is comprised of three sub-buses and a control bus, conducts signals between the IOIC and an IOBU in an asynchronous 'handshaking' manner. The synchronous bus, which is comprised of two sub-buses and a control bus, conducts signals between the IOIC and the SC/IOIU in an synchronous manner. The IOIC, interconnected between the synchronous bus and asynchronous bus, functions as a buffer between the faster synchronous bus and the slower asynchronous bus. Various operations are performed between an IOBU and the memory unit via the asynchronous bus, IOIC, synchronous bus, and SC/IOIU, such as a unit operation, a storage operation, and a message acceptance operation.


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