The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 1995

Filed:

Jun. 01, 1994
Applicant:
Inventors:

Andrzei Zaleski, Fairfax, VA (US);

Dimitris E Ioannou, Fairfax, VA (US);

Assignee:

Other;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518526 ; 365218 ; 257316 ; 257318 ;
Abstract

A simple stacked gate Electrically Erasable Programmable Read Only Memory (EEPROM) device fabricated on Silicon-on-Insulator (SOI) substrates(films) and a method to erase data in such device as well as in any other EEPROM devices fabricated on SOI substrates(films) is described. The new EEPROM device incorporates two separate control gates, a front control gate and a back control gate. In the new erasing method the back control gate is used to operate back channel of the EEPROM device in the avalanche region and generate hot carriers subsequently injected into the floating gate. The new erasing method is applicable to either n-channel or p-channel, inversion, accumulation or depletion mode devices.


Find Patent Forward Citations

Zaleski, Andrzei. (1995). Method for erasing data in eeprom devices on soi substrates and device (U.S. Patent No. 5455791). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5455791

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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